|
<< Click to Display Table of Contents >> Navigation: ASA-EMulatR Reference Guide > Introduction > Architecture Overview > Chapter 19 – Interrupt Architecture & IPI > 19.9 Repository Directory Mapping |
The interrupt and IPI subsystem spans the following directories:
Directory |
Key Files |
Responsibility |
|---|---|---|
coreLib/ |
IRQPendingState.h (~378 lines), InterruptRouter.h (~505 lines), IPI_core.h (~245 lines) |
Per-CPU interrupt tracking, routing policies, IPI command encoding/decoding |
emulatrLib/ |
IPIManager.h (~192 lines), ExecutionCoordinator.h |
Lock-free IPI message routing, barrier request dispatch |
memoryLib/ |
MemoryBarrierCoordinator.h (~278 lines) |
Global memory barrier synchronization across CPUs |
cpuCoreLib/ |
AlphaCPU.h (checkInterrupts, handleTLBShootdownIPI) |
Interrupt sampling, IPI handling in CPU run loop |
palLib_EV6/ |
Pal_Service.h (deliverInterrupt), PAL_core.h |
PAL interrupt delivery, PAL handler dispatch |
Total interrupt/IPI subsystem: Approximately 1,598 lines across the five core headers (IRQPendingState 378, InterruptRouter 505, IPI_core 245, IPIManager 192, MemoryBarrierCoordinator 278). The CPU-side integration (checkInterrupts, handleTLBShootdownIPI) is woven into AlphaCPU, and PAL delivery is handled by Pal_Service.
See Also: Chapter 16 – Device Model & DMA (device interrupt assertion); Chapter 17 – Address Translation, TLB, and PTE (TLB invalidation targets); Chapter 18 – Fault Dispatcher & Precise Exceptions (event delivery coordination); Chapter 20 – Boot Sequence, PAL, and SRM Integration (PAL interrupt handlers).