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Alpha AXP System Architecture Emulator
EMulatR is a high-fidelity architectural emulator of the DEC Alpha AXP processor family. It is designed to faithfully reproduce the architectural behavior of Alpha systems while running efficiently on modern hardware.
The project focuses on correctness, determinism, and structural clarity rather than cycle-exact microarchitectural simulation. Its goal is to provide a robust execution environment capable of booting and operating historical operating systems such as:
•OpenVMS
•Tru64 UNIX (DIGITAL UNIX)
•Linux for Alpha
•SRM firmware environments
EMulatR follows a layered architectural model. Each subsystem has a clearly defined responsibility and communicates through explicit contracts. The emulator prioritizes:
•Architectural correctness over microarchitectural timing
•Deterministic execution
•Explicit memory ordering semantics
•Precise exception and trap behavior
•SMP safety and race-free interaction
•Clear separation of CPU, memory, and device domains
The project does not attempt to replicate gate-level timing differences between EV4, EV5, EV6, or EV67 silicon revisions. Instead, it models the architectural guarantees defined by the Alpha System Architecture (ASA).
EMulatR implements:
•Alpha AXP instruction decoding and execution
•PALcode interface handling
•Integer, floating-point, vector, and control instruction classes
•Precise trap and exception handling
•Memory ordering semantics (MB, WMB, RMB, etc.)
•SMP-aware CPU execution model
•Device abstraction and MMIO handling
•Firmware bring-up targeting SRM boot
The system is structured to mirror Alpha’s conceptual hardware components, including execution domains such as I-Box, E-Box, F-Box, M-Box, and control layers.
The primary objectives of EMulatR are:
•Achieve architectural correctness as defined by the Alpha AXP specification.
•Boot to the SRM console prompt.
•Support multiprocessor (SMP) configurations.
•Provide a structured and maintainable emulator framework.
•Enable long-term preservation and experimentation with Alpha software ecosystems.
EMulatR explicitly does not aim to:
•Provide cycle-perfect silicon modeling
•Implement speculative out-of-order execution beyond architectural requirements
•Model hardware-accurate cache latencies
•Reproduce undocumented vendor behavior
•These constraints preserve maintainability and verifiability.
EMulatR is intended for:
•Systems engineers and architecture enthusiasts
•Researchers exploring Alpha AXP systems
•Developers interested in firmware bring-up and OS porting
•Preservation efforts for legacy Alpha software
Current Status
The project is under active development and progressing toward full SRM boot support. Major architectural components are implemented, with ongoing refinement of trap handling, firmware integration, and device modeling.