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<< Click to Display Table of Contents >> Navigation: ASA-EMulatR Reference Guide > Introduction > Architecture Overview > Chapter 2 - Execution Model > 2.9 Relationship to Other Chapters |
This chapter defines how execution progresses — the cycle contract, run-loop responsibilities, stall sources, and commit semantics. It deliberately does not define:
•How the pipeline stages work internally → Chapter 3 – Pipeline Architecture
•How individual instructions behave → Chapter 4 – Functional Execution Domains (Boxes)
•How memory is accessed and ordered → Chapter 5 – Memory System Architecture
•How barriers drain and release → Chapter 6 – Serialization and Stall Model
•How exceptions are classified and delivered → Chapter 7 – Exceptions, Faults, and Interrupts
•How PAL handlers execute → Chapter 8 – PAL and Privileged Boundary
•How CPUs coordinate in SMP → Chapter 9 – SMP Architecture
•How the AlphaCPU object is structured in code → Chapter 12 – AlphaCPU Core
Those chapters rely on the contracts established here. Any change to execution-model behavior must be validated against this chapter's normative rules.
See Also: 1.8 How to Read This Guide.