<< Click to Display Table of Contents >> Navigation:  ASA-EMulatR Reference Guide > Introduction > Architecture Overview > Chapter 1 - System Overview > 1.8 How to Read This Guide

This guide is organized into two groups. Group 1 (Chapters 1–11) defines the architecture: what must be true regardless of implementation. Group 2 (Chapters 12–22) defines the implementation: how the architectural rules are enforced in code. Recommended reading paths by role:

 

New Contributors

 

Chapter 1 (System Overview) → Chapter 3 (Pipeline Architecture) → Chapter 4 (Boxes) → Chapter 6 (Serialization)

 

Memory and SMP Work

 

Chapter 1 → Chapter 5 (Memory System Architecture) → Chapter 6 (Serialization) → Chapter 9 (SMP Architecture)

 

PAL and OS Integration

 

Chapter 1 → Chapter 7 (Exceptions) → Chapter 8 (PAL and Privileged Boundary) → Chapter 20 (Boot Sequence, PAL, SRM)

 

Device Development

 

Chapter 1 → Chapter 5 (Memory System) → Chapter 10 (Devices and MMIO) → Chapter 16 (Device Model and DMA)

 

Debugging and Validation

 

Chapter 1 → Chapter 11 (Invariants) → Chapter 21 (Debugging, Tracing, Determinism) → Chapter 22 (Testing and Validation)

 

Chapter Summary

 

1.1 Purpose and Audience — Defines intent, scope, and normative status

1.2 Design Goals — The five guiding principles in priority order

1.3 Target Architecture — Alpha AXP profile, platforms, and technology stack

1.4 Architectural Layers — Six-layer system decomposition

1.5 Non-Goals — What the emulator explicitly does not attempt

1.6 Control and Data Flow — End-to-end execution narrative

1.7 Architectural Invariants — Authoritative correctness rules

1.8 How to Read This Guide — Reading paths by contributor role

 

See Also: Chapter 11 - Architectural Invariants; Chapter 12 – AlphaCPU Core (implementation entry point).