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Memory barriers enforce ordering by stalling the pipeline until required conditions are met. Barriers do not perform memory operations, do not execute work, and only enforce completion of prior operations.

 

Barrier types:

 

MB — Full memory barrier. Ensures all prior loads and stores are globally visible before any subsequent loads or stores execute. Drains write buffers.

 

WMB — Write-only barrier. Ensures all prior stores are ordered relative to subsequent stores. Does not order loads.

 

EXCB — Exception barrier. Ensures all prior instructions have completed to the point where any exceptions they may generate have been delivered.

 

TRAPB — Trap barrier. Ensures all prior arithmetic trap-generating instructions have completed without traps before execution continues.

 

Full barrier semantics, stall conditions, and release mechanisms are defined in Chapter 6 — Serialization and Stall Model.

 

See Also: Chapter 6 - Serialization and Stall Model (full semantics).