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<< Click to Display Table of Contents >> Navigation: ASA-EMulatR Reference Guide > Introduction > Architecture Overview > Chapter 18 – Fault Dispatcher & Precise Exceptions > 18.9 Barrier Interaction |
Exceptions interact with the serialization and reservation systems through several mechanisms that ensure exception safety:
EXCB enforces exception precision — it cannot release until FaultDispatcher::eventPending() returns false. This guarantees that all exceptions from prior instructions have been delivered before instructions after the EXCB execute. EXCB is the strongest exception synchronization point available to user-mode code.
TRAPB enforces arithmetic trap ordering — it cannot release until FaultDispatcher::hasPendingArithmeticTraps() returns false. This ensures that all prior arithmetic traps have been delivered and cleared before later instructions execute. The TRAPB → FaultDispatcher interaction: when TRAPB stalls in the pipeline (via CBox::executeTRAPB with slot.mustComplete = true), it checks the FLAG_ARITHMETIC_TRAP bit each cycle and releases only when that bit is clear.
CALL_PAL implies full serialization — it acts as the strongest barrier. On CALL_PAL execution, the pipeline is fully drained, all pending events are resolved, and enterPalMode() is called with PalEntryReason::CALL_PAL_INSTRUCTION. Shadow registers are activated for PAL-mode register access.
Reservations are cleared on: exception delivery, PAL mode entry, certain barrier execution, context switches, and pipeline flush. This prevents stale atomic state from persisting across exception boundaries. A STx_C that follows an exception delivery will always fail (reservation broken), which is correct — the atomic sequence was interrupted.
See Also: 6.10 TRAPB - Trap Barrier; 6.12 Interaction with LL/SC; 7.11 Traps and TRAPB.