7.11 Traps and TRAPB

<< Click to Display Table of Contents >>

Navigation:  ASA-EMulatR Reference Guide > Introduction > Architecture Overview > Chapter 7 - Exceptions, Faults, and Interrupts >

7.11 Traps and TRAPB

Arithmetic traps are detected during execution but delivered after instruction retirement. This deferred delivery model means that without TRAPB, the precise instruction that caused the trap may be ambiguous.

 

TRAPB ensures precise arithmetic trap ordering by requiring all prior traps to be resolved before later instructions execute. The FaultDispatcher provides hasPendingArithmeticTraps() which tests the FLAG_ARITHMETIC_TRAP bit, and clearArithmeticTrap() which selectively clears arithmetic events while leaving other pending events intact.

 

The TRAPB → FaultDispatcher interaction: when TRAPB stalls in the pipeline (via CBox::executeTRAPB with slot.mustComplete = true), it cannot release until hasPendingArithmeticTraps() returns false — meaning all prior arithmetic traps have been delivered and cleared.

 

See Also: 6.10 TRAPB - Trap Barrier; faultLib/FaultDispatcher.h (hasPendingArithmeticTraps, clearArithmeticTrap).