Chapter 7 - Exceptions, Faults, and Interrupts

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Chapter 7 - Exceptions, Faults, and Interrupts

7.1 Purpose of This Chapter

 

This chapter defines how the AlphaCPU emulator detects, prioritizes, delivers, and resolves exceptions, faults, and interrupts while maintaining precise architectural state.

 

Alpha AXP enforces precise exceptions: when an exception is taken, all prior instructions have completed, and no later instruction has modified architectural state.

 

This chapter explains:

The classification of exceptional events

Where exceptions are detected

How they are queued and prioritized

When they are delivered

How pipeline state is preserved or discarded

How PAL mode is entered