7.7 Priority Ordering

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7.7 Priority Ordering

Alpha enforces strict priority ordering for exceptional events. Only one event may be delivered at a time. The FaultDispatcher resolves conflicts using the EventPriority enum and architectural rules.

 

Priority Order (Highest → Lowest)

 

1.Reset (EventPriority::Reset) — system/CPU reset, highest priority

2.Machine check (EventPriority::Critical, FLAG_MACHINE_CHECK) — hardware error, non-maskable

3.Arithmetic exceptions (FLAG_ARITHMETIC_TRAP) — overflow, divide-by-zero, FP traps

4.Floating-point exceptions — FP-specific faults via FPCR trap enables

5.Alignment faults (Unalign) — data alignment violations

6.DTB miss (FLAG_DTB_MISS) — data translation buffer miss (single and double)

7.ITB miss (FLAG_ITB_MISS) — instruction translation buffer miss

8.Access violation (DtbAcv, ItbAcv) — permission check failure

9.Illegal instruction (OpcDec, IllegalInstruction) — unrecognized or privileged opcode

10.Software traps (SoftwareTrap, BreakPoint) — BPT, BUGCHK, GENTRAP

11.Interrupts (FLAG_INTERRUPT) — hardware IRQs, IPIs, timer, device — lowest priority, maskable by IPL

 

When multiple events are pending simultaneously, the FaultDispatcher delivers the highest-priority event first. Lower-priority events remain queued until the higher-priority event is resolved.

 

See Also: Alpha AXP Architecture Reference Manual v6, Exception Handling chapter.