ASA-EMulatR Reference Guide > Introduction > Architecture Overview > Chapter 7 - Exceptions, Faults, and Interrupts

PendingEvent (PendingEvent_Refined.h, 420 lines) is the unified event structure for all exceptions, interrupts, and machine checks. It flows from the pipeline into FaultDispatcher and carries all information needed for PAL entry and exception delivery.

Core Fields

cpuId — CPU this event belongs to

eventClass (EventClass) — high-level classification: None, Exception, Interrupt, MachineCheck, Reset, InternalError, SystemEvent

priority (EventPriority) — dispatch priority: Low, Normal, High, Critical, Reset

kind (PendingEventKind) — event type: Exception, Interrupt, Ast, MachineCheck, Reset, PalCall

exceptionClass (ExceptionClass_EV6) — fine-grained exception type (32 values)

palVectorId (PalVectorId_EV6) — resolved PAL vector (set at delivery time, not detection)

Address and Context

faultVA — virtual address of the fault

faultPC — program counter at the faulting instruction

asn — address space number at time of fault

cm — current mode (kernel/executive/supervisor/user) at time of event

D-Stream Fault Specifics

For data-stream faults, PendingEvent carries DStreamFaultType: None, DTB_MISS_SINGLE, DTB_MISS_DOUBLE_3, DTB_MISS_DOUBLE_4, DFAULT_ACV, DFAULT_FOE, DFAULT_FOW, DFAULT_FOR, UNALIGN. Plus mmAccessType (Read/Write/Execute) and mmFaultReason.

Arithmetic and Machine Check

exc_Sum — arithmetic exception summary register value

exc_Mask — arithmetic exception mask

mcReason (MachineCheckReason) — machine check cause

mchkCode, mchkAddr — machine check details

Interrupt Specifics

deviceInterruptVector — device interrupt vector index

hwVector — hardware interrupt vector

hwIPL — hardware interrupt priority level

swiLevel — software interrupt level

astMode — AST target mode

Detailed Properties

PendingPropertyInfo (embedded struct) carries extended fault metadata: access type flags (isWrite, isExecute, isUnaligned, isInstruction), fault type flags (isMachineCheck, isAccessViolation, isInvalidPTE, isIllegalInstruction, isNonCanonical, isFaultOnExecute/Write/Read, isDoubleMiss), physical address, PTE value, and SMP fault info (initiatingCpu, participatingCpus, acknowledgedCpus, isSmpRendezvousFailure).

Design principle: pipeline code creates PendingEvent with ExceptionClass; FaultDispatcher resolves PalVectorId during preparation. Detection and delivery use the same structure.

See Also: faultLib/PendingEvent_Refined.h.