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<< Click to Display Table of Contents >> Navigation: ASA-EMulatR Reference Guide > Introduction > Architecture Overview > Chapter 6 - Serialization and Stall Model > 6.7 MB - Full Memory Barrier |
MB enforces global ordering of all memory operations. It guarantees that all prior loads complete, all prior stores are globally visible, write buffers are fully drained, and read queues are empty.
CBox::executeMB() performs two steps:
1.Local drain — drainWriteBuffers(&slot) flushes this CPU's write buffer to GuestMemory
2.Global coordination — RequestMemoryBarrier(slot, MemoryBarrierKind::MB) forwards to the ExecutionCoordinator, which initiates a global barrier, sends IPIs to all other CPUs, and waits for acknowledgments
MB2 (MemoryBarrierKind 0x8400) is an alternate encoding with identical semantics.
MB is released when: all older pipeline slots are empty, all write buffers are drained, all prior memory operations have completed, and no pending memory faults exist.
MB is used for lock acquisition and release, SMP synchronization, device register sequencing, and ensuring memory visibility before signaling another CPU.
See Also: CBoxLib/CBoxBase.h (executeMB); 5.9 Write Buffers.