|
<< Click to Display Table of Contents >> Navigation: ASA-EMulatR Reference Guide > Introduction > Architecture Overview > Chapter 6 - Serialization and Stall Model > 6.6 Barrier Release Model |
A stalled barrier is released only when its release conditions are satisfied. Barrier release is evaluated once per cycle by the pipeline.
The release mechanism operates through the advance() helper in AlphaPipeline, which is called when the barrier slot is ready to proceed:
// AlphaPipeline::advance() - barrier release
if (slot.needsWriteBufferDrain) {
m_cBox->drainWriteBuffers(&slot);
slot.needsWriteBufferDrain = false;
}
if (slot.needsMemoryBarrier) {
m_cBox->RequestMemoryBarrier(slot, slot.barrierKind);
slot.needsMemoryBarrier = false;
}
For EXCB barriers, the release logic uses checkBarrierRelease(), which verifies that all prior stages are clear and no pending events exist:
// AlphaPipeline::checkBarrierRelease()
if (slot.serializeType == SerializationType::Barrier_EXC) {
bool allClear = true;
for (int j = 0; j < slot.currentStage; ++j) {
if (stage(j).valid) allClear = false;
}
if (allClear && !slot.m_faultDispatcher->eventPending()) {
slot.stalled = false; // Release!
}
}
When released, slot.stalled is cleared, the barrier advances through MEM and WB normally, and frontend fetch resumes.
See Also: cpuCoreLib/AlphaPipeline.h (checkBarrierRelease, advance).