ASA-EMulatR Reference Guide > Introduction > Architecture Overview > Chapter 2 - Execution Model > 2.3 Responsibilities of the AlphaCPU Run Loop

The AlphaCPU run loop is the clocked execution engine. Each iteration represents one hardware cycle. The run loop is the only place where execution advances.

At a high level, the run loop is responsible for:

•Advancing the instruction pipeline (via AlphaPipeline::tick())

•Enforcing architectural serialization (barriers, PAL entry)

•Delivering exceptions and interrupts (via FaultDispatcher and IRQPendingState)

•Coordinating SMP-visible events (IPI receipt, reservation management)

•Maintaining architectural state and statistics (cycle counter, trace logging)

The run loop does not:

•Implement instruction semantics — those are delegated to Boxes via grains

•Perform device operations — devices operate asynchronously via MMIO

•Enforce memory ordering implicitly — ordering is explicit via barriers

The entry point is AlphaCPU::runOneInstruction(), which is marked AXP_HOT AXP_ALWAYS_INLINE for performance on the critical path. This method is called repeatedly by the execution coordinator's run loop.

Run Loop Invariants

The run loop must enforce:

•One cycle per iteration — no multi-cycle shortcuts

•Deterministic ordering — phases always execute in the same sequence

•No mid-instruction interruption — interrupts are sampled between instructions, never during

•No speculative privilege leakage — PAL mode transitions are serialized

•Precise exception semantics — all prior instructions complete, no later instruction has committed