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<< Click to Display Table of Contents >> Navigation: ASA-EMulatR Reference Guide > Introduction > Architecture Overview > Chapter 20 – Boot Sequence, PAL, and SRM Integration > 20.4 PAL Mode Entry and Exit |
PalBoxBase::enterPal() performs the complete PAL mode transition in a fixed sequence:
BoxResult enterPal(PalEntryReason reason, quint64 vectorOrSelector, quint64 faultPC) {
// 1. Record metadata (entry reason, vector, fault PC)
m_entryReason = reason;
m_entryVector = vectorOrSelector;
m_faultPC = faultPC;
// 2. Save complete context (UNIFIED — same for all entry types)
m_iprGlobalMaster->saveContext();
// 3. Compute entry PC
if (reason == PalEntryReason::CALL_PAL_INSTRUCTION)
entryPC = computeCallPalEntry(vectorOrSelector);
else
entryPC = vectorOrSelector; // Direct vector for faults/interrupts
// 4. Set EXC_ADDR to faulting/return PC
m_iprGlobalMaster->h->exc_addr = faultPC;
// 5. Enter PAL mode: PC = vector | 0x1, IPL = 7, CM = KERNEL
m_iprGlobalMaster->h->pc = entryPC | 0x1ULL;
m_iprGlobalMaster->h->setIPL_Unsynced(7);
m_iprGlobalMaster->h->setCM(CM_KERNEL);
// 6. Activate shadow registers
m_shadowRegsActive = true;
// 7. Return flush request
return BoxResult().flushPipeline();
}
The low bit of PC (| 0x1) is the architectural PAL mode indicator checked by the execution engine on every instruction. saveContext() captures the full register-context snapshot including integer registers, floating-point registers, PS, IPL, PC, and relevant execution state for later restoration by HW_REI.
PalEntryReason classifies why PAL mode was entered, which determines how the entry vector is computed:
Reason |
Vector Source |
|---|---|
CALL_PAL_INSTRUCTION |
Computed dispatch offset from PAL_BASE |
FAULT_DTBM |
Direct vector: DTB miss |
FAULT_ITB |
Direct vector: ITB miss |
FAULT_ARITH |
Direct vector: arithmetic exception |
FAULT_UNALIGNED |
Direct vector: alignment fault |
FAULT_ACV |
Direct vector: access violation |
INTERRUPT |
Direct vector: hardware/software interrupt |
AST |
Direct vector: asynchronous system trap |
MACHINE_CHECK |
Direct vector: machine check |
TRAP |
Direct vector: software trap |
HW_REI (Hardware Return from Exception/Interrupt) is the only architecturally legal exit from PAL mode. AlphaCPU::executeREI() performs a complete architectural state restore:
BoxResult executeREI(PipelineSlot& slot) {
// 1. Restore COMPLETE context (HWPCB + registers)
m_iprGlobalMaster->restoreContext();
// 2. Get return PC (now restored)
quint64 returnPC = m_iprGlobalMaster->h->pc;
// 3. Setup pipeline redirect
slot.reiTarget = returnPC;
slot.pcModified = true;
// 4. Flush pipeline
return BoxResult().flushPipeline();
}
restoreContext() performs a full vector copy from the saved register-context snapshot back into the active processor state: integer registers, floating-point registers (if enabled), PS, IPL, PC, and relevant execution state. HW_REI is an implicit serialization point — before execution resumes, write buffers are drained if required, LL/SC reservations are cleared, the pipeline is flushed, and instruction fetch restarts at the restored PC. No speculative instruction may execute across an HW_REI boundary.
The design choice to restore the full register context (rather than selectively restoring fields) provides stronger correctness guarantees and ensures no residual PAL state leaks into non-PAL execution.
See Also: PalBoxLib/PalBoxBase.h – enterPal(); cpuCoreLib/AlphaCPU.h – executeREI(); 8.4 CALL_PAL - Entering the Privileged Boundary; 8.9 HW_REI - Exiting PAL Mode .