8.9 HW_REI - Exiting PAL Mode

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8.9 HW_REI - Exiting PAL Mode

8.9.1 Purpose

 

HW_REI (Hardware Return from Exception/Interrupt) is the only architecturally legal exit from PAL mode. It restores processor execution from a privileged PAL context back to the interrupted or faulted execution context while preserving precise architectural state. No other instruction may exit PAL mode, restore privilege level, or resume interrupted execution. Any attempt to bypass HW_REI is architecturally illegal and must fault.

 

8.9.2 Implementation

 

AlphaCPU::executeREI() performs a complete architectural state restore:

 

BoxResult executeREI(PipelineSlot& slot) {

 // 1. Restore COMPLETE context (HWPCB + registers)

 m_iprGlobalMaster->restoreContext();

 

 // 2. Get return PC (now restored)

 quint64 returnPC = m_iprGlobalMaster->h->pc;

 

 // 3. Setup pipeline redirect

 slot.reiTarget = returnPC;

 slot.pcModified = true;

 

 // 4. Flush pipeline

 return BoxResult().flushPipeline();

}

 

restoreContext() performs a full vector copy from the saved register-context snapshot back into the active processor state. This includes integer registers, floating-point registers (if enabled), PS, IPL, PC, and relevant internal execution state.

 

8.9.3 Restored State

 

On HW_REI execution, the following state is restored atomically:

Program Counter (PC) — instruction address at which execution resumes

Processor Mode (CM) — returns to prior mode (User, Supervisor, Executive, or Kernel)

Processor Status (PS) — condition codes, interrupt enable state, architectural flags

Interrupt Priority Level (IPL) — restores prior IPL for correct interrupt arbitration

Interrupt state — re-enables or maintains interrupt masking as defined by the restored PS

 

8.9.4 Serialization Guarantees

 

HW_REI is an implicit serialization point. Before execution resumes: PAL execution completes, write buffers are drained if required, LL/SC reservations are cleared, pipeline is flushed, and instruction fetch restarts at the restored PC. No speculative instruction may execute across an HW_REI boundary.

 

8.9.5 Design Rationale

 

EMulatR's choice to restore the full register context (rather than selectively restoring fields) provides stronger correctness guarantees, easier verification and debugging, and clear separation between PAL and non-PAL execution. No residual PAL state leaks into non-PAL execution. This is a deliberate design choice that supports nested exceptions, SMP preemption, and debugger integration.