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9.1 Purpose of This Chapter

 

This chapter defines how EmulatR implements symmetric multiprocessing (SMP) while preserving Alpha AXP architectural guarantees.

 

SMP is not an add-on. It affects:

•Memory visibility

•Exception delivery

•Atomic operations

•Interrupt routing

•PAL behavior

•Serialization and barriers

 

This chapter explains:

•How CPUs are instantiated and identified

•What state is per-CPU vs shared

•How CPUs coordinate

•How ordering is enforced across CPUs

•How correctness is preserved without global locking