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<< Click to Display Table of Contents >> Navigation: ASA-EMulatR Reference Guide > Introduction > Architecture Overview > Chapter 4 - Functional Execution Domains ("Boxes) > 4.7 MBox - Memory Box |
MBox implements memory access semantics, not memory ownership. GuestMemory owns the physical address space; MBox provides the execution-side interface for loads, stores, translation, and reservation management.
•Load operations — LDL, LDQ, LDQ_U, LDL_L, LDQ_L (sign-extension, unaligned, load-locked)
•Store operations — STL, STQ, STQ_U, STL_C, STQ_C (store-conditional)
•Address calculation — calculateEffectiveAddress(slot) computes Rb + SEXT(displacement)
•Alignment checking — enforces longword (4-byte) and quadword (8-byte) alignment; raises ALIGNMENT_FAULT on violation
•Address translation — delegates to Ev6Translator for VA→PA translation via the DTB (data) and ITB (instruction) translation buffers
•MMIO routing — physical addresses in MMIO regions are routed through the mmio_Manager to registered IDeviceEmulator instances
•LL/SC reservation interactions — LDL_L/LDQ_L establish reservations; STL_C/STQ_C test and conditionally succeed; delegation to ReservationManager
•Memory access fault detection — TLB miss (DTBM_SINGLE, DTBM_DOUBLE), access violation (ACV_FAULT), fault-on-read/write
•Bit manipulation instructions — BSR, CTPOP, CTLZ, CTTZ (routed to MBox due to opcode encoding)
•Cache hint instructions — ECB, WH64 (currently stubbed)
Memory accesses occur in the EX stage, not in the MEM stage. The MEM pipeline stage exists for ordering and retirement, not for actual memory access. Loads complete synchronously in EX — the data is placed in slot.payLoad immediately. Stores compute the address (slot.va, slot.pa) in EX; the actual write to GuestMemory is deferred to stage_WB.
All load methods follow the same pattern:
void executeLDQ(PipelineSlot& slot) noexcept {
slot.va = calculateEffectiveAddress(slot); // Rb + SEXT(disp)
// Alignment check (8-byte for LDQ)
if ((slot.va & 0x7) != 0) { /* ALIGNMENT_FAULT */ }
// Translate VA → PA via Ev6Translator
if (!m_ev6Translator->translateLoadAddress(slot, slot.va, pa, ...)) { /* TLB miss */ }
// Read from GuestMemory
MEM_STATUS memStat = m_guestMemory->read64(pa, data);
slot.payLoad = data;
slot.needsWriteback = true;
}
Implementation: MBoxBase.h (2,256 lines) with supporting MBoxBase.cpp. Dependencies: GuestMemory, Ev6Translator, ReservationManager, FaultDispatcher.
Invariant: All architectural memory side effects originate in MBox.
See Also: Chapter 5 - Memory System Architecture; 3.15 LL/SC Interaction with the Pipeline; MBoxLib_EV6/MBoxBase.h.