Appendix C – Physical Address Memory Map

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Appendix C – Physical Address Memory Map

Canonical PA routing table for ASA-EmulatR. All physical address classification is performed by GuestMemory, which is the single source of truth for PA routing. Regions are non-overlapping and ordered by PA.

 

PA Range

Size

Target

Description

0x0000_0000 – 0x0001_0000

64 KB

SafeMemory

Low memory: scratch, HWRPB data structure (at +0x2000), reserved

0x0001_0000 – 0x2000_0000

~512 MB

Unmapped

Reserved — fault on access

0x2000_0000 – 0x2020_0000

2 MB

SRMFirmware

SRM firmware loadable image (read-only)

0x2020_0000 – 0x8000_0000

~1.5 GB

Unmapped

Reserved — fault on access

0x8000_0000 – 0x8_8000_0000

32 GB

SafeMemory

Main RAM (contiguous physical memory)

0x10_0000_0000 – 0x20_0000_0000

64 GB

MMIOManager

Device CSRs, BARs, PCI configuration space

0x20_0000_0000+

Unmapped

Reserved for future expansion

 

Design principle: SafeMemory is the only writable RAM target. SafeMemory is discontinuous in PA space (two regions: low 64 KB and main RAM) but contiguous internally. The paToSafeMemoryOffset() function translates PA to SafeMemory buffer offset. SafeMemory uses SparseMemoryBacking for on-demand page allocation.

 

See Also: Chapter 15 – Memory System Implementation Details  (GuestMemory routing, SafeMemory); Chapter 16 – Device Model & DMA (MMIOManager address space).