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<< Click to Display Table of Contents >> Navigation: ASA-EMulatR Reference Guide > Introduction > Architecture Overview > Chapter 20 – Boot Sequence, PAL, and SRM Integration > 20.7 PAL Function Inventory |
The PalBox supports approximately 80 PAL functions from the GrainMaster.tsv master opcode table, organized by category. All entries have Type PALcode and target PalBox.
Privileged IPR Access (MFPR_* / MTPR_*): ASN, ASTEN, ASTSR, CC, DTB_ASN, DTB_CM, DTB_TAG, DTB_PTE, ESP, FEN, IER, IPL, ISR, KSP, MCES, PCBB, PRBR, PTBR, SCBB, SISR, SSP, SYSPTBR, TBCHK, USP, VPTB, WHAMI, PERFMON, DATFX, and others. MFPR functions write R0; MTPR functions read R16.
System Operations: HALT, RESTART, REBOOT, DRAINA (drain aborts), CFLUSH (cache flush), SWPCTX (context switch), IMB (instruction memory barrier), INITPAL (initialize PAL), DI/EI (disable/enable interrupts), SWPIPL (swap IPL).
Mode Transitions: CHMK (Change Mode to Kernel), CHME (to Executive), CHMS (to Supervisor), CHMU (to User). Each raises the associated mode-change exception through PAL vectors.
TLB Management: TBIA (invalidate all), TBIS (invalidate single), TBISD (DTB single), TBISI (ITB single), TBISASN (by ASN), DTBIS (DTB invalidate single).
Unprivileged PAL Calls: BPT (breakpoint), BUGCHK (bugcheck), CALLSYS (system call), GENTRAP (general trap), KBPT (kernel breakpoint), RD_PS (read PS), IMB, REI (return from exception).
Interlocked Queue Operations: INSQHIL, INSQHILR, INSQHIQ, INSQHIQR, INSQTIL, INSQTILR, INSQTIQ, INSQTIQR, INSQUEL, INSQUEQ, INSQUEL_D, INSQUEQ_D, REMQHIL, REMQTIL, REMQHIQ, REMQTIQ, REMQUEL, REMQUEQ, REMQUEUD, REMQUEQ_D. These implement atomic queue manipulation using PAL-mode serialization.
Console/Debug Services: CSERVE (console service dispatch), WRIPIR (write IPI register), WRFEN (write FEN), WRVPTPTR (write VPTB pointer), WRVAL/RDVAL (write/read scratch value), WRKGP/RDKSP (kernel GP/SP), WRUSP/RDUSP (user SP), WRENT (write entry address), WRPERFMON (write performance monitor).
Memory Probes: PROBER (probe read access), PROBEW (probe write access). These test whether a virtual address is accessible at a given mode without faulting.
Register Convention: PAL shadow registers substitute for R8–R14 and R25. MFPR functions write R0. MTPR functions read R16. CSERVE reads R16 (selector), R17–R19 (arguments), writes R0 (return value). Functions with no explicit register marking operate on implicit state only.
See Also: grainfactoryLib/grains/GrainMaster.tsv (616-entry master opcode table); 8.12 PAL Register Matrix.