<< Click to Display Table of Contents >> Navigation:  ASA-EMulatR Reference Guide > Introduction > Architecture Overview > Chapter 8 - PAL and Privileged Boundary > 8.3 Privilege Levels

Alpha defines multiple execution modes, modeled explicitly via the Current Mode (CM) field of the Processor Status (PS) register:

 

Kernel (CM = 0) — full system access, OS kernel code

Executive (CM = 1) — intermediate privilege

Supervisor (CM = 2) — intermediate privilege

User (CM = 3) — unprivileged application code

PAL — strictly above all others, indicated by PC bit 0 = 1

 

Rules enforced by the emulator:

•Only PAL may access IPRs (HW_MFPR/HW_MTPR)

•Only PAL may execute HW_LD/HW_ST (physical memory access bypassing translation)

•Only PAL may return from exceptions using HW_REI

•Only PAL may manipulate TLB and cache control registers

•CALL_PAL functions 0x00–0x3F are privileged (kernel mode only); 0x80–0xBF are unprivileged

 

See Also: palLib_EV6/PAL_core.h (privilege mode constants).