<< Click to Display Table of Contents >> Navigation:  ASA-EMulatR Reference Guide > Introduction > Architecture Overview > Chapter 6 - Serialization and Stall Model > 6.9 EXCB - Exception Barrier

6.9.1 Semantics

 

EXCB ensures precise exception state. It guarantees that all prior instructions are fully retired, all exception state registers (EXC_ADDR, EXC_SUM) are stable, and no speculative instructions exist beyond the barrier.

 

6.9.2 Implementation

 

CBox::executeEXCB() is currently implemented as a defensive no-op — the pipeline's checkBarrierRelease() handles the actual EXCB release logic by scanning prior stages for completion and checking that no pending events exist in the FaultDispatcher. This ensures EXCB cannot release until all older instructions have retired and all exceptions have been delivered.

 

6.9.3 Release Conditions

 

EXCB is released when: all older pipeline slots are empty (stage(j).valid == false for all j < currentStage), all prior exceptions have been delivered, and FaultDispatcher reports no eventPending().

 

6.9.4 Usage

 

EXCB is used before exception delivery, before PAL exception entry, and after instructions that may raise deferred faults (e.g., FP operations with trap-enable qualifiers).

 

See Also: CBoxLib/CBoxBase.h (executeEXCB); cpuCoreLib/AlphaPipeline.h (checkBarrierRelease).