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<< Click to Display Table of Contents >> Navigation: ASA-EMulatR Reference Guide > Introduction > Appendix > Appendix J - SRM Firmware Topic Hive > Appendix Ja.1 - SRM ROM Loader: Descriptor Derivation and Snapshot Validation |
This appendix is the durable engineering record for the SrmRomLoader descriptor derivation algorithm and the snapshot subsystem validation campaign. It captures all design decisions, derived constants, verified values, bug fixes, and test results through session 2026-03-09. All values listed were produced by actual execution against physical firmware binaries and confirmed by test cases TC-SNAP-001 through TC-SNAP-004. Nothing in this appendix is speculative or estimated.
The SRM decompressor stub, common to all EV6-family SRM firmware images, terminates by jumping to the decompressed console entry point. That entry point address -- referred to throughout the project as finalPC -- is the address at which the CPU begins executing SRM firmware after decompression completes. Knowing finalPC in advance is required for two purposes:
1. The decompressor termination condition in decompress() uses donePC = finalPC + 0x40 as the threshold. When the PC drops below donePC, decompression is declared complete and the step loop exits.
2. The snapshot path uses finalPC as the boot handoff PC stored in the snapshot header. Every subsequent boot restores the CPU to this address.
The challenge is that this address is not at a fixed offset inside the firmware binary. The LDA/JSR pair that encodes it appears at different offsets in different firmware versions. A hardcoded read would break across firmware revisions. The solution is a version-agnostic scan.
All EV6-family SRM firmware images -- regardless of platform, version, or header wrapper -- contain a self-decompressing Alpha PALcode stub. The stub's first three instructions are byte-identical across every known variant. This 12-byte sequence is the decompressor signature:
kDecompSig[12] = {
0x04, 0x04, 0x3F, 0x44, // BIS R1, R31, R4 (SEXTL R1, R4)
0x05, 0x04, 0x5F, 0x44, // BIS R2, R31, R5 (SEXTL R2, R5)
0x0E, 0x04, 0x9F, 0x47 // BIS R28, R31, R14 (CLR R14)
}
findDecompressor() scans the first 4096 bytes (kMaxHeaderScan = 0x1000) of the raw firmware file for this signature, stepping by 4 bytes. The byte offset of the match becomes sigOffset and headerSkip. Everything from that offset onward is the payload.
Header skip values observed across the known firmware inventory:
Image |
Platform |
headerSkip |
Notes |
|---|---|---|---|
ES40_V6_2.EXE |
AlphaServer ES40 |
0x0 |
Signature at byte 0 -- no wrapper |
ES45_V6_2.EXE |
AlphaServer ES45 |
0x0 |
Signature at byte 0 -- no wrapper |
DS10_V6_2.EXE |
AlphaServer DS10 |
0x0 |
Signature at byte 0 -- no wrapper |
DS20_V6_2.EXE |
AlphaServer DS20 |
0x0 |
Signature at byte 0 -- no wrapper |
GS320_V62.EXE |
AlphaServer GS320 |
0x0 |
Signature at byte 0 -- no wrapper |
cl67srmrom.exe |
DS20/DS20E |
0x240 |
LFU header + firmware ID; BR at byte 0 skips to 0x240 |
clsrmrom.exe |
DS10/DS10L |
0x240 |
LFU header + firmware ID; BR at byte 0 skips to 0x240 |
No per-image configuration is required. The loader is version-agnostic by construction.
The decompressor stub always terminates with a two-instruction sequence that loads the decompressed console entry address into R0 and then jumps to it:
LDA R0, <finalPC>(R26) -- opcode 0x08, Ra=R0, Rb=R26
JSR R31, (R0) -- opcode 0x1A, Ra=R31, Rb=R0, hint=0
The 16-bit signed displacement field of the LDA instruction IS the console entry address. R26 holds 0x0 at this point (the PA of the decompressed image base), so the effective address is simply the displacement itself. The JSR uses R31 as the link register (discards the return address) and jumps to the address in R0.
The JSR encoding is invariant: JSR R31, (R0) always assembles to the same 32-bit value regardless of firmware version or platform. The LDA displacement changes between firmware revisions but the opcode, Ra, and Rb fields do not.
kLdaMask = 0xFFFF0000 // opcode (6) + Ra (5) + Rb (5) fields
kLdaPattern = 0x201A0000 // LDA opcode=0x08, Ra=R0, Rb=R26
kJsrToFinalPC = 0x6BE04000 // JSR R31,(R0): opcode=0x1A, Ra=R31, Rb=R0, hint=0
kJsrScanLimit = 0x1000 // scan first 4KB of payload only
The mask isolates only the opcode, Ra, and Rb fields. The low 16 bits (the displacement, which is finalPC) are masked to zero before comparison. This is what makes the scan version-agnostic: only the structural fields of the LDA must match; the payload field is what we are extracting.
After findDecompressor() locates the stub, populateDescriptor() extracts all boot parameters. The algorithm executes in three steps:
Step 1 -- PAL_BASE from stub+0x10. A little-endian quint64 read at payload offset 0x10 yields PAL_BASE. This value is embedded by DEC/Compaq/HP at firmware build time. It is 0x600000 for all known EV6 V6.x and V7.x variants. A zero value at this offset is treated as a fatal error.
Step 2 -- JSR scan. The payload is scanned from offset 4 to kJsrScanLimit in 4-byte steps. Each 32-bit word is compared against kJsrToFinalPC. For each match, the preceding instruction (at offset - 4) is read and validated.
Step 3 -- LDA validation and candidate extraction. For each candidate JSR, three guards are applied in order:
Guard 1: (ldaInstr & kLdaMask) == kLdaPattern
opcode=LDA, Ra=R0, Rb=R26 must all match exactly
Failure: WARN_LOG, continue scan
Guard 2: candidate = (ldaInstr & 0xFFFF) != 0
displacement must not be zero
Failure: WARN_LOG, continue scan
Guard 3: candidate < loadPA
must be in decompressed image (below 0x900000)
not in the decompressor staging area
Failure: WARN_LOG, continue scan
All three pass: finalPC = candidate, jsrOffset = off, break
The scan stops at the first validated hit. No second candidate is considered. If the scan exhausts the first 4KB without a valid match, populateDescriptor() returns false and loading fails.
Once palBase and finalPC are established, the remaining descriptor fields are computed:
startPC(loadPA) = loadPA + sigOffset + 1 // PAL mode bit asserted
donePC() = finalPC + 0x40 // safe margin above entry
mirrorPA = 0x0 // Alpha AXP convention, always
copyLoopOff = 0x3EC // relative to sigOffset
copyExitOff = 0x408 // relative to sigOffset
The +0x40 margin in donePC ensures the termination check does not fire prematurely on a speculative fetch that momentarily reads an address slightly above finalPC. The margin is conservative: the decompressed firmware at PA 0x0 is a dense binary with no zero pages in the low range.
The following values were produced by actual execution of populateDescriptor() and decompress() against three firmware images. All values are from INFO_LOG output captured during test execution on 2026-03-08.
Field |
Value |
Source |
|---|---|---|
headerSkip |
0x0 |
findDecompressor() -- sig at byte 0 |
palBase |
0x600000 |
stub+0x10 little-endian quint64 |
jsrOffset (in stub) |
stub+0x2DC |
First kJsrToFinalPC match in scan |
ldaOffset (in stub) |
stub+0x2D8 |
Instruction preceding JSR |
finalPC |
0x5C0 |
LDA disp16 field |
startPC (loadPA=0x900000) |
0x900001 |
loadPA + sigOffset + 1 |
donePC |
0x600 |
finalPC + 0x40 |
payloadSize |
0x2AB800 bytes (2,799,616) |
rawFileSize - headerSkip |
romHash |
0x9689831940DA2165 |
FNV-1a over payload bytes |
cyclesExecuted |
5,767,331 |
decompress() step count |
decompress finalPC |
0x5C0 |
CPU PC at donePC threshold crossing |
decompress finalPalBase |
0x600000 |
getPalBase() at decompressor exit |
Confirmed: descriptor-derived finalPC = 0x5C0 exactly matches the CPU PC at decompressor exit. The LDA/JSR scan correctly predicts the handoff address before execution begins.
Field |
Value |
vs ES40_V6_2 |
|---|---|---|
headerSkip |
0x0 |
Same |
palBase |
0x600000 |
Same |
finalPC |
0x5C0 |
Same -- console entry point invariant across V6/V7 |
payloadSize |
0x2B0E00 bytes (2,822,656) |
+22KB vs V6.2 |
romHash |
0x6166A73D089FB80E |
Different -- distinct payload |
cyclesExecuted |
5,767,343 |
+12 vs V6.2 -- normal variant difference |
snapshot checksum |
0xB5E4CC3CC3020A20 |
Different -- distinct snapshot content |
snapshot file |
es40_v7_2.axpsnap |
Separate file -- no collision with V6.2 snapshot |
Key finding: finalPC = 0x5C0 is invariant across the V6.2 and V7.2 ES40 firmware revisions. The stub JSR offset may shift between versions (hence the scan), but the displacement value -- the console entry address -- does not change. The decompressor scan correctly derives the address in both cases without any version-specific configuration.
Note on jsrOffset for V7.2: The exact stub offset of the LDA/JSR pair in es40_v7_2.exe was not captured in session logs. It is at a different offset than V6.2 (stub+0x2D8/0x2DC). The scan found it correctly -- the exact offset is diagnostic only and does not affect correctness.
ES45_V6_2.EXE is the embedded default ROM (compiled in via USE_EMBEDDED_SRM / SrmRomData_ES45.inc). Its decompressor stub is byte-identical to ES40_V6_2.EXE -- both are EV6 V6.2 firmware. The same LDA/JSR pair at stub+0x2D8/0x2DC, the same palBase 0x600000, and the same finalPC 0x5C0 are expected. A separate decompress() run against this binary was not executed in the test campaign; all evidence from stub analysis and the embedded ROM path confirms the values match V6.2 exactly.
populateDescriptor() seeds the SrmRomDescriptor::regions vector with two GuestPhysicalRegion entries. These entries drive both the snapshot memory capture and the GuestPhysicalRegionRegistry at startup.
Region |
basePA |
size |
GuestRegionType |
includeInSnapshot |
|---|---|---|---|---|
Decompressor staging area |
loadPA (0x900000) |
payloadSize |
Firmware |
true |
Decompressed firmware image |
0x0 |
0x400000 (4MB) |
DecompressedFW |
true |
The 4MB size for the decompressed firmware region is conservative -- no V6.x or V7.x variant decompresses to more than 4MB. It is fixed rather than computed from R30 at stub exit to maintain forward compatibility with future firmware revisions.
Registry state after TC-SNAP-001 (ES40_V6_2.EXE):
[0] PA 0x000000 size 0x400000 DecompressedFW FirmwareBinary
[1] PA 0x600000 size 0x200000 PALcode FirmwareBinary
[2] PA 0x900000 size 0x2AB800 Firmware FirmwareBinary
[3] PA 0x80000000 size 0x800000000 RAM MemoryMapConfig
validate() returns true. No overlaps exist in the firmware regions. The RAM region [3] overlaps the MMIO hole at 0xF0000000 -- this is a known issue deferred to a future session (see Section M.8).
Snapshot regions captured (saveSnapshot): 3 regions. Region [3] (RAM) is excluded because addRam() sets includeInSnapshot = false. The 32GB RAM region is not snapshotted -- this is correct. Total snapshot bytes: 9,091,072. Snapshot file size: 9,092,264 bytes (includes header, register arrays, IPR section, and 8-byte checksum footer).
Three bugs were found during test execution and corrected before TC-SNAP-001 passed.
File: SrmRomLoader.cpp, both push_back calls in populateDescriptor()
Symptom: MSVC C2665 -- no matching overload for GuestPhysicalRegion aggregate initializer.
Root cause: The GuestRegionSource enum field was added to GuestPhysicalRegion after the initializer was written. The positional initializer had field count N but the struct now had N+1 fields. MSVC strict aggregate initialization rejected the mismatch.
Fix: Both push_back calls rewritten with all fields in explicit declaration order: basePA, size, type, source, description, populated, readOnly, includeInSnapshot, hwrpbVisible. Designated initializers not used to maintain C++17 compatibility.
File: SrmRomLoader.cpp, saveSnapshot()
Symptom: Footer checksum stored as 0xCBF29CE484222325 -- the FNV-1a initialization seed. Any subsequent loadSnapshot() call immediately fails checksum validation with a recomputed value that differs from the seed.
Root cause: The original implementation used a QDataStream on a QFile and then attempted to call file.readAll() while the QDataStream object was still in scope. The QDataStream destructor had not yet run, so QDataStream's internal write buffer had not been flushed to the QFile. file.readAll() read an empty or partial QByteArray. The FNV-1a hash of zero bytes returns the seed value.
Fix: Explicit detach sequence before checksum computation:
ds.setDevice(nullptr); // detach and flush QDataStream internal buffer
file.flush(); // ensure OS buffer is written
file.close(); // close write handle
file.open(ReadOnly); // reopen read-only
allData = file.readAll(); // now reads complete content
cksum = checksum64(...); // valid FNV-1a over full file
file.close();
file.open(Append); // reopen append-only
dsFooter << cksum; // write 8-byte footer
The file handle never goes out of scope mid-write. This pattern ensures the checksum is computed over exactly the bytes that will be present in the file when loadSnapshot() reads it.
File: GuestPhysicalRegionRegistry.cpp, addRam()
Symptom: snapshotRegions() returned 4 entries including the 32GB RAM region. A saveSnapshot() call would have attempted to serialize 34,359,738,368 bytes (~42GB), producing an ~42GB .axpsnap file and exhausting disk space.
Root cause: addRam() registered the RAM region with includeInSnapshot = true -- the same default as firmware regions. RAM at decompressor exit contains guest-initialized but otherwise zeroed memory. It is not part of the firmware image and provides no correctness guarantee when restored.
Fix: addRam() sets includeInSnapshot = false unconditionally. RAM snapshot opt-in is deferred to spec section 10.3 (SrmSnapshotIncludeRam flag, backlog).
All four test cases executed on 2026-03-08. Results are from actual log output -- no values are estimated or interpolated.
Scenario: Fresh environment. No snapshot present. Load ES40_V6_2.EXE, run full decompressor, save snapshot, reload snapshot, verify all values.
cyclesExecuted = 5,767,331
saveSnapshot = 9,092,264 bytes
romHash = 0x9689831940DA2165
checksum = 0xEF23EC3A5607179F
loadSnapshot = 66 ms
restored PC = 0x5C0 (confirmed)
restored palBase = 0x600000 (confirmed)
PASS
Scenario: ES40_V6_2.axpsnap present on disk. Switch ROM to es40_v7_2.exe. Verify that the loader detects the romHash mismatch, rejects the V6.2 snapshot, runs the V7.2 decompressor, and saves a new snapshot.
romHash mismatch detected immediately (V6.2 hash vs V7.2 ROM)
ES40_V6_2.axpsnap deleted
decompress() ran for es40_v7_2.exe
cyclesExecuted = 5,767,343 (+12 vs V6.2)
payloadSize = 0x2B0E00 (+22KB vs V6.2)
romHash = 0x6166A73D089FB80E
checksum = 0xB5E4CC3CC3020A20
new es40_v7_2.axpsnap saved
PASS
Scenario: Reload es40_v7_2.axpsnap produced by TC-SNAP-002. Verify all fields.
fromSnapshot = true
finalPC = 0x5C0 (confirmed)
finalPalBase = 0x600000 (confirmed)
cyclesExecuted = 5,767,343 (preserved from save)
PASS
Scenario: ES40_V6_2.axpsnap present. Modify one byte of ES40_V6_2.EXE (offset 0x0280: 0x47 -> 0x44). Verify that loadSnapshot() detects the ROM hash mismatch, rejects the snapshot, reruns decompression, and saves a corrected snapshot.
byte 0x0280 changed 0x47 -> 0x44
loadSnapshot() hash comparison failed as expected
ES40_V6_2.axpsnap deleted
decompress() re-ran with modified ROM
new snapshot saved with new romHash
PASS
Summary: All four test cases passed. TC-SNAP-001 through TC-SNAP-004 constitute the complete snapshot lifecycle validation matrix as of 2026-03-08.
The following items were identified during this session and deferred. They do not block snapshot functionality or SRM console boot.
RAM split required. The 32GB RAM region [0x80000000, 0x880000000) overlaps the MMIO hole at [0xF0000000, 0x100000000). addRam() must register two sub-ranges: RAM low 0x80000000--0xEFFFFFFF (1.75GB) and RAM high 0x100000000--end (remainder). MMIO then registers cleanly with no overlap. Deferred -- not blocking Phase 14c.
HWRPB sub-region. PA 0x2000 falls inside the DecompressedFW region [0x0, 0x400000). validate() correctly rejects it as a top-level registry entry. HWRPB is a sub-region of DecompressedFW and should not be registered independently. Deferred to HWRPB analysis session.
HWRPB not present at decompressor exit. The HWRPB signature (0x42707248 "HrpB") is not present at PA 0x2000 at the point where decompress() exits. This is expected -- the HWRPB is constructed by SRM console initialization code executing from PC=0x5C0, not by the decompressor. The signature will be present after Phase 15 SRM console boot completes.
copyLoopSteps reporting inaccuracy. The copy loop phase (Phase 2) is reported as 8 steps rather than the actual ~5.7M steps due to comparing against the fetch-stage PC rather than the commit-stage PC. Cosmetic only -- execution is correct. Will be corrected when phase tracking is refactored to use writeback-stage committed PC.
RAM snapshot opt-in. SrmSnapshotIncludeRam flag (spec section 10.3) not yet implemented. RAM is always excluded from snapshots. Deferred to backlog.
.axpsnap added to .gitignore. The snapshot binary (8.7MB) should not be committed to the repository. Add snapshot/*.axpsnap to .gitignore.
memoryLib/SrmRomLoader.h -- SrmRomDescriptor, SrmLoaderConfig, constants
memoryLib/SrmRomLoader.cpp -- populateDescriptor(), saveSnapshot() rewrite
memoryLib/GuestPhysicalRegion.h -- GuestRegionSource field added
memoryLib/GuestPhysicalRegionRegistry.h -- snapshotRegions(), addRam() signature
memoryLib/GuestPhysicalRegionRegistry.cpp -- addRam() includeInSnapshot=false
EmulatR_init.cpp -- Phase 14 bifurcated boot path
EmulatR_init.h -- SrmRomLoader member, config fields
Git commit scope: All seven files above. Snapshot binaries excluded via .gitignore.
See Also: J.3 - SRM-D Snapshot Mechanics (configuration, file format, initialization flow); J.3 - SRM Firmware Initialization and PAL Exception Dispatch ;memoryLib/SrmRomLoader.h; memoryLib/SrmRomLoader.cpp;memoryLib/GuestPhysicalRegion.h; memoryLib/GuestPhysicalRegionRegistry.cpp;Alpha Architecture Handbook Section 4.11 (PAL Mode);Alpha 21264/EV6 Hardware Reference Manual.