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<< Click to Display Table of Contents >> Navigation: ASA-EMulatR Reference Guide > Introduction > Architecture Overview > Chapter 22 – Testing, Validation, and Architectural Compliance > 22.9 Architectural Compliance Matrix |
EMulatR maintains a living compliance matrix mapping Alpha AXP architectural requirements to implementation status. Each requirement from the Alpha Architecture Reference Manual, the EV6 Hardware Reference Manual, and the PAL specifications is tracked with one of four status values:
Status |
Meaning |
|---|---|
Implemented |
Feature is implemented, tested, and covered by regression tests. Architectural behavior matches the specification. |
Partially Implemented |
Core behavior is implemented but edge cases, optional features, or performance characteristics may be incomplete. Documented with specific gaps identified. |
Intentionally Deferred |
Feature is understood but deliberately postponed. The deferral reason is documented, the architectural impact is assessed, and the implementation path is identified for future work. |
Not Applicable |
Feature does not apply to the emulator's scope (e.g., physical pin behavior, electrical characteristics, manufacturing test modes). |
The compliance matrix is organized by architectural domain: instruction set (integer, floating-point, memory, branch, PAL), memory system (translation, ordering, coherency), exception system (classification, delivery, precision), interrupt system (priority, masking, delivery), SMP (barriers, LL/SC, IPI, shootdown), and privileged boundary (PAL entry/exit, IPR access, privilege enforcement).
This matrix is part of the documentation set and is updated whenever implementation status changes. It is the authoritative source for "what does the emulator actually implement" — distinct from "what does the architecture specify."
See Also: Alpha Architecture Reference Manual; 21264/EV6 Hardware Reference Manual, Table 5-8 (exception vectors).