ASA-EMulatR Reference Guide > Introduction > Architecture Overview > Chapter 20 – Boot Sequence, PAL, and SRM Integration > 20.10 Architectural Invariants (Normative)

The following invariants govern the PAL emulation subsystem. Violation of any invariant constitutes an emulator bug.

Binary Privilege: Execution state is either inside PAL mode or outside PAL mode. There is no intermediate state, no partial privilege, and no legal mechanism to blur this boundary. PC bit 0 = 1 indicates PAL mode.

Single Entry, Single Exit: CALL_PAL is the only legal entry into PAL mode. HW_REI is the only legal exit. Exception and interrupt vectors also enter PAL mode through enterPal(), but the entry mechanism is architecturally defined — no ad-hoc entry exists.

Full Serialization: PAL entry implies a full barrier stronger than MB + EXCB combined. Write buffers are drained, reservations are cleared, the pipeline is flushed, and interrupts are masked. No speculative instruction may execute across a PAL boundary.

Complete Context Save/Restore: saveContext() captures the full architectural state. restoreContext() restores the full architectural state. No partial restoration is permitted. No residual PAL state leaks into non-PAL execution.

Privileged Instruction Enforcement: HW_MFPR, HW_MTPR, HW_LD, HW_ST, and HW_REI fault with OPCDEC outside PAL mode. Enforcement is at instruction decode time.

Reservation Clearing: LL/SC reservations are cleared unconditionally on CALL_PAL entry, HW_REI exit, exception delivery, interrupt delivery, and context switch. Reservations never survive privilege boundaries.

PAL Exclusivity: All exception and interrupt handlers are PAL code. No exception handler exists outside PAL. All delivery paths converge on enterPal().

C++ Implementation: PAL is implemented as C++ code via PalBoxBase → PalService delegation. There is no PAL code stored in GuestMemory. This is a deliberate design choice that eliminates memory synchronization issues while faithfully implementing the architectural interface.

See Also: Chapter 11 - Architectural Invariants (complete invariant reference); 8.10 Enforcing the Privileged Boundary.