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<< Click to Display Table of Contents >> Navigation: ASA-EMulatR Reference Guide > Introduction > Architecture Overview > Chapter 13 – AlphaPipeline Implementation > 13.11 Branch Handling |
IBox predicts the branch target during fetch. For each decoded branch, IBox calls CBox::queryPrediction(branchPC, outPredictedTarget) and stores the result in slot.predTaken, slot.predTarget, slot.predictionTarget, and slot.predictionValid. If the predictor returns taken with a valid target, IBox speculatively fetches from the predicted target. Otherwise, IBox fetches sequentially from PC+4.
Unconditional branches (BR, BSR) have their target known at decode — prediction is always correct. Conditional branches (BEQ, BNE, BGT, BLE, etc.) rely on the CBox branch predictor. Register-indirect jumps (JMP, JSR, RET, COROUTINE) use the Branch Target Buffer for the last known target.
Branches are resolved in stage_EX(). The grain evaluates the actual branch condition and sets slot.branchTaken and slot.branchTarget. The pipeline then compares the actual outcome against the prediction:
Correct prediction: slot.branchTaken matches the predicted direction and slot.branchTarget matches slot.predictionTarget. No pipeline disruption — speculatively fetched instructions continue flowing normally. This is the common case.
Misprediction: actual outcome differs from prediction (wrong direction or wrong target). slot.flushPipeline is set to true. The execute() method detects this after stage_EX() and calls flushYoungerSlots() — stages IF, DE, and IS are invalidated. The corrected PC (slot.branchTarget for taken, slot.nextPC for not-taken) is used for the next fetch cycle. Misprediction cost is the depth of the invalidated pipeline stages (up to 3 cycles of wasted work).
Branch predictor tables are updated at retirement in stage_WB() via CBox::recordBranchResolution(pc, actualTarget, wasTaken, wasPredicted, predictedCorrectly). Training occurs for every branch — correct and mispredicted alike — so the predictor learns from all outcomes. Training at WB (not EX) ensures that only architecturally committed branch outcomes update the predictor; speculative branches that are flushed never corrupt predictor state.
The architectural PC is updated only in WB via retirement — no earlier stage modifies the committed PC. During speculative execution, IBox maintains a speculative fetch PC that advances ahead of the architectural PC. On misprediction, the speculative PC is corrected to the resolved target, but the architectural PC remains unchanged until the correcting instruction retires.
See Also: Section 3.9 – Branch Resolution; Appendix J - Branch Prediction Mechanics (predictor structures, strategies, hit rates, and CBox interface).