<< Click to Display Table of Contents >> Navigation:  ASA-EMulatR Reference Guide > Introduction > Architecture Overview > Chapter 12 – AlphaCPU Core > 12.12 Performance and Instrumentation

AlphaCPU tracks performance counters: m_localInstrCount (instructions retired) and m_localCycleCount (cycles elapsed). The architectural cycle counter (CC register) is managed by incrementCycleCount(), which respects the CC_CTL_ENABLE and CC_CTL_FREEZE_PAL control bits — the cycle counter does not increment during PAL mode when the freeze bit is set.

 

Instrumentation is controlled by the AXP_INSTRUMENTATION_TRACE compile-time flag. When enabled, EXECTRACE macros emit trace records for PAL entry (EXECTRACE_PAL_ENTRY), PAL exit (EXECTRACE_PAL_EXIT), interrupts (EXECTRACE_INTERRUPT), and register writes. The ExecTrace system records PalEntryReasonTrace (CALL_PAL, FAULT, INTERRUPT, TRAP, MACHINE_CHECK), WriteEntry (register type/index/value), and timing information.

 

All critical methods are marked AXP_HOT AXP_ALWAYS_INLINE to ensure they remain on the hot path without function call overhead. The AlphaCPU class is alignas(8) for cache-friendly layout.

 

See Also: coreLib/ExecTrace.h (PalEntryReasonTrace, WriteEntry).