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<< Click to Display Table of Contents >> Navigation: ASA-EMulatR Reference Guide > Introduction > Architecture Overview > Chapter 10 – Devices and Memory-Mapped I/O (MMIO) > 10.5 MMIOManager - MMIO Address Space |
MMIO regions are distinguished from RAM by address range, not instruction type. When GuestMemory::findRoute(pa) resolves to RouteTarget::MMIOManager, the access is forwarded to the MMIOManager. When it resolves to RouteTarget::SafeMemory, the access goes to RAM. This distinction occurs after VA→PA translation in MBox.
The default MMIO PA range is 0x10_0000_0000–0x20_0000_0000 (64 GB), as defined by the GuestMemory PA routing table.
MMIOManager (mmio_Manager.h, 114 lines) is the central MMIO dispatch engine. It maintains a table of registered regions and routes reads/writes to the appropriate device handler.
Handler registration uses function pointers for maximum performance:
typedef quint64 (*ReadFn)(void* ctx, quint64 offset, quint8 width) noexcept;
typedef void (*WriteFn)(void* ctx, quint64 offset, quint64 value, quint8 width) noexcept;
struct Handlers {
void* ctx; // Device context pointer
ReadFn read; // Read handler
WriteFn write; // Write handler
};
Each MMIO region is described by RegionDescriptor:
struct RegionDescriptor {
quint64 basePA; // Start physical address
quint64 sizeBytes; // Region size
quint32 flags; // Access policy (see RegionFlags)
quint32 deviceUid; // Owning device UID
quint32 hoseId; // PCI hose (interrupt domain)
};
RegionFlags control per-region access policy: WIDTH_8/16/32/64 (allowed access widths), REQUIRE_NATURAL_ALIGNMENT or ALLOW_UNALIGNED, and HAS_SIDE_EFFECTS (indicates the region has side effects on access).
API: registerRegion(desc, handlers) adds a region; finalize() locks the region table for runtime; handleRead(pa, width, &value) and handleWrite(pa, width, value) dispatch to device handlers, returning MMIOStatus.
See Also: mmioLib/mmio_Manager.h; 5.5 GuestMemory - Shared Physical Memory (PA routing).