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The DecodedInstruction structure (DecodedInstruction_Ultra.h) uses an ultra-optimized packed layout (24-byte hot path) and is the primary data carrier through the pipeline.

 

Creation:

DecodedInstruction di;

di.pc = pc;

setRaw(di, rawInstruction); // Pack into high 32 bits of semantics

di.grain = GrainResolver::instance().ResolveGrain(rawInstruction);

decodeInstruction(di, rawInstruction, di.grain, pc);

 

Field access: getRaw(di) extracts raw 32-bit instruction (~1 cycle). getOpcodeFromPacked(di) fast-path opcode (~2 cycles). getRA(di), getRB(di), getRC(di) return register indices. usesLiteral(di) checks literal vs register operand. getLiteral(di) returns the 8-bit literal value.

 

Semantic queries: isLoad(di), isStore(di), isBranch(di), writesToR31(di) (destination is R31 — result discarded).

 

Typical grain execute pattern:

void execute(const DecodedInstruction& di, AlphaProcessorContext& ctx) {

 quint64 vb = ctx.readIntReg(getRB(di));

 quint64 vc = usesLiteral(di) ? getLiteral(di) : ctx.readIntReg(getRC(di));

 quint64 result = vb + vc;

 if (!writesToR31(di)) ctx.writeIntReg(getRA(di), result);

}

 

See Also: coreLib/DecodedInstruction_Ultra.h; Chapter 13 – AlphaPipeline Implementation  (PipelineSlot carries DecodedInstruction).