<< Click to Display Table of Contents >> Navigation:  ASA-EMulatR Reference Guide > Introduction > Architecture Overview > Chapter 22 – Testing, Validation, and Architectural Compliance > 22.1 Definition of Correctness

Correctness in EMulatR is defined architecturally, not microarchitecturally. The emulator claims correctness when:

 

Architectural state transitions match Alpha AXP rules. Exceptions are precise and ordered. Memory ordering semantics are preserved. SMP interactions are race-free and deterministic. Privileged boundaries are enforced.

 

EMulatR does not claim: cycle-exact microarchitectural modeling, hardware-accurate cache timing, vendor-specific undocumented behavior, or silicon-level timing fidelity. This distinction is intentional and explicit — the emulator trades microarchitectural realism for deterministic correctness and debuggability.

 

The test and validation strategy defends the claims that are made and explicitly documents the claims that are not. Every invariant declared in Chapter 11 must have at least one corresponding validation test. Untested invariants are considered aspirational until proven.

 

See Also: Chapter 1 - System Overview  (goals and non-goals); Chapter 11 - Architectural Invariants  (testable invariant definitions).