<< Click to Display Table of Contents >> Navigation:  ASA-EMulatR Reference Guide > Introduction > Architecture Overview > Chapter 21 – Debugging, Tracing, and Determinism > 21.8 Deterministic Replay

EMulatR supports deterministic replay by recording external inputs (console keystrokes, device events), interrupt injection points (cycle number and CPU ID of each interrupt delivery), DMA completion timing, and SMP synchronization events (barrier initiations, IPI deliveries, acknowledgments). Replay guarantees identical execution, identical fault timing, and identical SMP interaction — every architectural state transition is reproduced exactly.

 

The replay mechanism depends on the determinism guarantees provided by the pipeline: in-order retirement, one commit per cycle, no speculative side effects, and deterministic stage ordering within the run loop. External events are replayed at their recorded cycle counts, producing the same interrupt delivery, the same fault sequences, and the same barrier synchronization patterns. This enables binary-level bug reproduction, cross-version validation (running the same replay against different emulator builds), and regression testing.

 

Replay limitations: debugger intervention is not replayed (breakpoints and single-step alter execution flow), host-dependent device timing in non-deterministic mode produces non-replayable traces (deterministic scheduling mode must be enabled for replayable recordings), and the initial memory image must be identical.

 

See Also: Chapter 13 – AlphaPipeline Implementation (pipeline determinism guarantees that enable replay).